发明授权
US06316358B1 Method for fabricating an integrated circuit device 有权
集成电路器件的制造方法

  • 专利标题: Method for fabricating an integrated circuit device
  • 专利标题(中): 集成电路器件的制造方法
  • 申请号: US09346271
    申请日: 1999-07-01
  • 公开(公告)号: US06316358B1
    公开(公告)日: 2001-11-13
  • 发明人: Jong-Chan Shin
  • 申请人: Jong-Chan Shin
  • 优先权: KR98-26917 19980703
  • 主分类号: H01L2144
  • IPC分类号: H01L2144
Method for fabricating an integrated circuit device
摘要:
A method for forming a uniform conductive pattern on an integrated circuit substrate having a step by a single photography process. An exposure mask has a different pattern in accordance with the topology of the integrated circuit substrate. The exposure mask has a increased inter-pattern space at a lower portion of the step and has a reduced inter-pattern space at a upper portion of the step. During the exposure process, a sufficient amount of light is applied to a photoresist layer at the lower portion of the step and an optical amount of light is applied to the photoresist layer at the upper portion of the step. As a result, scum phenomenon at the lower portion of the step can be prevented. Further, overetching of the conductive pattern at the upper portion of the step can be prevented.
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