The quality classes of arriving short cells and the ATM virtual connections to be multiplexed are identified based on the CIDs of those short cells. Those short cells are written into FIFO memories corresponding to the ATM virtual connections and quality classes. A VC specification control section specifies one ATM virtual connection for each ATM cell sending timing. At this time, a sequence specification control section specifies one or more quality classes in sequence. A readout control section reads one or more short cells out from the FIFO memory in accordance with the specified ATM virtual connection and quality class, stores them in one ATM cell and sends the ATM cell to the ATM virtual connection specified by the VC specification control section.