发明授权
- 专利标题： Synchronous semiconductor memory device having redundant circuit of high repair efficiency and allowing high speed access
- 专利标题（中）： 同步半导体存储器件具有高修复效率和允许高速访问的冗余电路
-
申请号： US09502332申请日： 2000-02-11
-
公开(公告)号： US06331956B1公开(公告)日： 2001-12-18
- 发明人: Tsukasa Ooishi , Shigeki Tomishima , Hiroki Shimano
- 申请人： Tsukasa Ooishi , Shigeki Tomishima , Hiroki Shimano
- 优先权： JP10-175000 19980622
- 主分类号： G11C702
- IPC分类号： G11C702
摘要：
A redundant memory cell column region provided corresponding to respective regular memory cell column regions can have data read and written through a sub I/O line pair and a main I/O line pair independent to those of the regular memory cell column region. Also, one redundant memory cell column region can be connected to a corresponding global I/O line pair G-I/O of any of the regular memory cell column regions via a multiplexer to be replaceable of any of two regular memory cell column regions.
信息查询
