发明授权
- 专利标题: Semiconductor device manufacturing method
- 专利标题(中): 半导体器件制造方法
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申请号: US09564550申请日: 2000-05-04
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公开(公告)号: US06335252B1公开(公告)日: 2002-01-01
- 发明人: Toshiyuki Oishi , Yukio Nishida , Hirokazu Sayama , Hidekazu Oda
- 申请人: Toshiyuki Oishi , Yukio Nishida , Hirokazu Sayama , Hidekazu Oda
- 优先权: JP11-345924 19991206
- 主分类号: H01L21336
- IPC分类号: H01L21336
摘要:
An MIS transistor manufacturing method which can prevent unwanted diffusion of extensions caused by the drive to the source/drain so that the diffusion of the source/drain and the diffusion of the extensions can independently be controlled so as to obtain optimum structure for each. Source/drain are formed by ion implantation using, as a mask, L-shaped silicon nitride films formed on sides of a gate electrode and silicon oxide films covering the silicon nitride films. The silicon oxide films are then removed leaving the silicon nitride films. Impurity ions are then ion-implanted into the main surface of the silicon substrate through the silicon nitride films. Since the silicon nitride films are thicker in the vicinity of the gate electrode and thinner in the vicinity of the source/drain, this process forms extensions penetrating under the gate electrode for a small distance.