发明授权
- 专利标题： Input circuit of a memory having a lower current dissipation
- 专利标题（中）： 具有较低电流消耗的存储器的输入电路
-
申请号： US09542454申请日： 2000-04-04
-
公开(公告)号： US06339353B1公开(公告)日： 2002-01-15
- 发明人: Hiroyoshi Tomita , Naoharu Shinozaki
- 申请人： Hiroyoshi Tomita , Naoharu Shinozaki
- 优先权： JP11-266324 19990920
- 主分类号： H03K3356
- IPC分类号： H03K3356
摘要：
The present invention provides an input circuit having small current consumption in a clock synchronization type semiconductor integrated circuit. The input circuit is activated by an activation signal to receive an input signal and an activation signal generating circuit generates the activation signal. The activation signal generating circuit activates intermittently the activation signal for a time shorter than a period of a clock signal and including a setup time and a hold time of the input signal in order to activate the input circuit. The input circuit is activated only for the limited time of one period of the clock signal and therefore current consumption can be reduced.
信息查询
