发明授权
- 专利标题: Offsetting comparator device and comparator circuit
- 专利标题(中): 偏移比较器器件和比较器电路
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申请号: US09461381申请日: 1999-12-15
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公开(公告)号: US06339355B1公开(公告)日: 2002-01-15
- 发明人: Hiroyuki Yamauchi , Yutaka Terada
- 申请人: Hiroyuki Yamauchi , Yutaka Terada
- 优先权: JP10-357236 19981216
- 主分类号: H03L500
- IPC分类号: H03L500
摘要:
An offsetting comparator device includes master and slave comparator circuits and a reference differential voltage generator. The master comparator circuit supplies a sensed current corresponding to a potential difference represented by a differential signal on a transmission line. The reference differential voltage generator generates a reference differential voltage based on an intermediate potential of the differential signal. And the slave comparator circuit supplies a current corresponding to the potential difference as offset current. The offsetting comparator device outputs a differential current between the sensed and offset currents and therefore shows an offset in its input/output characteristics. The master and slave comparator circuits have the same circuit configuration. Thus, if the characteristic of the sensed current output from the master comparator circuit has changed due to a potential level variation of the differential signal, then the characteristic of the offset current also changes similarly. Thus, the offsetting comparator device can obtain a constant offset voltage even if the potential level of the differential signal has changed.
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