发明授权
- 专利标题: Technology for high performance buried contact and tungsten polycide gate integration
- 专利标题(中): 技术用于高性能埋地接触和钨硅化合物门集成
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申请号: US09389630申请日: 1999-09-03
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公开(公告)号: US06351016B1公开(公告)日: 2002-02-26
- 发明人: Kuo-Ching Huang , Shou-Gwo Wuu , Jenn-Ming Huang , Dun-Nian Yaung
- 申请人: Kuo-Ching Huang , Shou-Gwo Wuu , Jenn-Ming Huang , Dun-Nian Yaung
- 主分类号: H01L2976
- IPC分类号: H01L2976
摘要:
A buried contact junction is described. A gate silicon oxide layer is provided over the surface of a semiconductor substrate. A polysilicon layer is deposited overlying the gate oxide layer. A hard mask layer is deposited overlying the polysilicon layer. The hard mask and polysilicon layers are etched away where they are not covered by a mask to form a polysilicon gate electrode and interconnection lines wherein gaps are left between the gate electrode and interconnection lines. A layer of dielectric material is deposited over the semiconductor substrate to fill the gaps. The hard mask layer is removed. The polysilicon layer is etched away where it is not covered by a buried contact mask to form an opening to the semiconductor substrate. Ions are implanted to form the buried contact. A refractory metal layer is deposited overlying the buried contact and the polysilicon gate electrode and interconnection lines and planarized to form polycide gate electrodes and interconnection lines. The dielectric material layer is removed. An oxide layer is deposited and anisotropically etched to leave spacers on the sidewalls of the polycide gate electrodes and interconnection lines to complete the formation of a buried contact junction in the fabrication of an integrated circuit.
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