发明授权
US06352899B1 Raised silicide source/drain MOS transistors having enlarged source/drain contact regions and method 失效
具有放大的源极/漏极接触区域的加强硅化物源极/漏极MOS晶体管和方法

  • 专利标题: Raised silicide source/drain MOS transistors having enlarged source/drain contact regions and method
  • 专利标题(中): 具有放大的源极/漏极接触区域的加强硅化物源极/漏极MOS晶体管和方法
  • 申请号: US09497626
    申请日: 2000-02-03
  • 公开(公告)号: US06352899B1
    公开(公告)日: 2002-03-05
  • 发明人: Keizo SakiyamaSheng Teng Hsu
  • 申请人: Keizo SakiyamaSheng Teng Hsu
  • 主分类号: H01L21336
  • IPC分类号: H01L21336
Raised silicide source/drain MOS transistors having enlarged source/drain contact regions and method
摘要:
A method is provided for forming silicided source/drain electrodes in active devices in which the electrodes have very thin junction regions. In the process, adjacent active areas are separated by isolation regions, typically by LOCOS isolation, trench isolation or SOI/SIMOX isolation. A contact material, preferably silicide, is deposited over the wafer and the underling structures, including gate and interconnect electrodes. The silicide is then planed away using CMP, or another suitable planing process, to a height approximate the height of the highest structure. The silicide is then electrically isolated from the electrodes, using an etch back process, or other suitable process, to lower the silicide to a height below the height of the gate or interconnect electrode. The wafer is then patterned and etched to remove unwanted silicide. The remaining silicide typically forms silicided source regions and silicided drain regions that extend over a portion of the adjacent isolation regions such that the silicided source/drain regions are larger than the underlying source/drain regions to provide a larger contact area.
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