发明授权
US06356134B1 Universal clock generator circuit and adjustment method for providing a plurality of clock frequencies
失效
通用时钟发生器电路和用于提供多个时钟频率的调整方法
- 专利标题： Universal clock generator circuit and adjustment method for providing a plurality of clock frequencies
- 专利标题（中）： 通用时钟发生器电路和用于提供多个时钟频率的调整方法
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申请号： US09531734申请日： 2000-03-21
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公开(公告)号： US06356134B1公开(公告)日： 2002-03-12
- 发明人: Lawrence A. Clevenger , Louis L. C. Hsu , Li-Kong Wang , Kevin P. Guay
- 申请人： Lawrence A. Clevenger , Louis L. C. Hsu , Li-Kong Wang , Kevin P. Guay
- 主分类号： G06F104
- IPC分类号： G06F104
摘要：
A universal clock generator circuit, in accordance with the present invention, includes an oscillator unit including circuitry for providing a first clock frequency. A plurality of load blocks are included. The load blocks are selectively connectable to the oscillator such that a range of clock rates are derived from the first clock frequency by selectively connecting a number of the load blocks to the oscillator unit to provide one of a plurality of clock frequencies from a same output.
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