发明授权
US06359342B1 Flip-chip bumping structure with dedicated test pads on semiconductor chip and method of fabricating the same 有权
在半导体芯片上具有专用测试焊盘的倒装凸块结构及其制造方法

Flip-chip bumping structure with dedicated test pads on semiconductor chip and method of fabricating the same
摘要:
A flip-chip bumping technology is proposed, which provides a flip-chip bumping structure with dedicated test pads on semiconductor chip and method of fabricating the same. The proposed flip-chip bumping technology is characterized by the forming of a lined-array of electrically-conductive dual-pad blocks respectively over the internal I/O points of the semiconductor chip, each dual-pad block including a first pad and a second pad located beside and electrically connected to the first pad; and wherein the respective first and second pads of the dual-pad blocks-are alternately designated as bump pads and test pads. During testing procedure, the probing to the internal circuitry of the semiconductor chip is carried out through the test-pad portions of the dual-pad blocks, so that the probing needles would leave no scratches over the bumppad portions of the same. During subsequent bumping process, solder bumps are formed respectively over the bump-pad portions of the dual-pad blocks. Since the bump-pad portions of the dual-pad blocks would be left unscratched, it allows the solder bump attachment to be more assured in quality and reliability.
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