发明授权
US06362037B1 Semiconductor device and method of fabricating same 失效
半导体装置及其制造方法

  • 专利标题: Semiconductor device and method of fabricating same
  • 专利标题(中): 半导体装置及其制造方法
  • 申请号: US09131350
    申请日: 1998-08-10
  • 公开(公告)号: US06362037B1
    公开(公告)日: 2002-03-26
  • 发明人: Ikuo YoshiharaKazuaki Kurooka
  • 申请人: Ikuo YoshiharaKazuaki Kurooka
  • 优先权: JPP08-308779 19961105; JPP08-358921 19961227
  • 主分类号: H01L218238
  • IPC分类号: H01L218238
Semiconductor device and method of fabricating same
摘要:
An N-type buried diffusion layer as a portion of the collector region of a bipolar transistor and an N-type buried diffusion layer of a memory cell region are simultaneously formed, and the buried diffusion layer of the memory cell region serves as a potential groove for electrons. The threshold voltage of a MOS transistor in the memory cell region is higher than the threshold voltage of a MOS transistor in a peripheral circuit region, preventing an increase in the standby current in the memory cell region. This increases the soft error resistance of the memory cell and prevents a decrease in the operating speed and an increase in the consumption power.
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