发明授权
- 专利标题： Semiconductor integrated circuit device and method for production of the same
- 专利标题（中）： 半导体集成电路器件及其制造方法
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申请号： US09390682申请日： 1999-09-07
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公开(公告)号： US06372554B1公开(公告)日： 2002-04-16
- 发明人: Keizo Kawakita , Kazuhiko Kajigaya , Seiji Narui , Kiyoshi Nakai , Kazunari Suzuki , Hideaki Tsugane , Fumiyoshi Sato
- 申请人： Keizo Kawakita , Kazuhiko Kajigaya , Seiji Narui , Kiyoshi Nakai , Kazunari Suzuki , Hideaki Tsugane , Fumiyoshi Sato
- 优先权： JP10-251609 19980904
- 主分类号： H01L2182
- IPC分类号： H01L2182
摘要：
A pattern of more than one conductive layer overlying a fuse formed in a TEG region is subject to OR processing; further, a combined or “synthetic” pattern with an opening pattern of one or more testing pads connected to said fuse added thereto is copied by transfer printing techniques to a photosensitive resin layer that is coated on the surface of a semiconductor wafer, thereby forcing the resin layer to reside only in a selected area of a scribe region, to which area the synthetic pattern has been transferred.