发明授权
- 专利标题： Fault tolerant computing system using instruction counting
- 专利标题（中）： 容错计算系统使用指令计数
-
申请号： US09234797申请日： 1999-01-19
-
公开(公告)号： US06374364B1公开(公告)日： 2002-04-16
- 发明人: James J. McElroy , Clark Johnson
- 申请人： James J. McElroy , Clark Johnson
- 主分类号： G06F1100
- IPC分类号： G06F1100
摘要：
In order to provide a microprocessor based fault tolerant computing system, hardware counters or event monitors that are normally included on the microprocessor chips are used to count application instructions that are being executed by the microprocessors. By counting the instructions and preempting the execution of the application program after a predetermined number of instructions have been executed, it is possible to cause the application programs to execute in congruent frames so that results from the application can be checked at congruent points of their execution. If the results do not match, then the program can be terminated or if a number of microprocessors are being used, the results can be voted on and the ones that match can be used in further computation by the system.