发明授权
US06380566B1 Semiconductor device having FET structure with high breakdown voltage
有权
具有具有高击穿电压的FET结构的半导体器件
- 专利标题: Semiconductor device having FET structure with high breakdown voltage
- 专利标题(中): 具有具有高击穿电压的FET结构的半导体器件
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申请号: US09669737申请日: 2000-09-26
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公开(公告)号: US06380566B1公开(公告)日: 2002-04-30
- 发明人: Tomoko Matsudai , Yusuke Kawaguchi , Kazutoshi Nakamura , Hirofumi Nagano , Akio Nakagawa
- 申请人: Tomoko Matsudai , Yusuke Kawaguchi , Kazutoshi Nakamura , Hirofumi Nagano , Akio Nakagawa
- 优先权: JP11-274708 19990928
- 主分类号: H01L2974
- IPC分类号: H01L2974
摘要:
An N-MOSFET is formed on an SOI substrate consisting of a semiconductor substrate, an insulating layer and an n−-active layer. A p-well layer, an n-RESURF layer, and an n-diffusion layer are formed in the surface of the n−-active layer between a source electrode and a drain electrode by means of impurity diffusion. The diffusion regions of the p-well layer and the n-RESURF layer overlap with each other. An end of the n-RESURF layer reaches a position below a gate electrode. The diffusion regions of the p-well layer and the n-diffusion layer do not overlap with each other, so that the n-RESURF layer has a region in direct contact with the n−-active layer between the p-well layer and the n-diffusion layer.
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