A method of manufacturing a DRAM capacitor comprises the steps of providing a semiconductor substrate having a source/drain region thereon, and then forming an insulating layer over the substrate. Next, a storage node opening that exposes the source/drain region is formed in the insulating layer, and then a conductive layer is formed above the storage node opening and the insulating layer. Thereafter, porous insulating material is deposited over the first conductive layer. The porous material includes porous oxide, NanoPorous Silica or Xerogel Sol-Gel, for example. Subsequently, the porous insulating layer is used as a mask to carry out a plasma-etching operation so that a portion of the conductive layer is etched away to form a plurality of long and narrow crevices. Hence, a fork-shaped conductive layer is formed. The fork-shaped first conductive layer serves as the lower electrode of a capacitor. Finally, the porous insulating layer is removed, and then the dielectric layer and the upper electrode of a capacitor are sequentially formed over the fork-shaped structure.