发明授权
US06391769B1 Method for forming metal interconnection in semiconductor device and interconnection structure fabricated thereby
有权
用于在半导体器件中形成金属互连的方法和由此制造的互连结构
- 专利标题: Method for forming metal interconnection in semiconductor device and interconnection structure fabricated thereby
- 专利标题(中): 用于在半导体器件中形成金属互连的方法和由此制造的互连结构
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申请号: US09525154申请日: 2000-03-14
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公开(公告)号: US06391769B1公开(公告)日: 2002-05-21
- 发明人: Jong-myeong Lee , Hyun-seok Lim , Byung-hee Kim , Gil-heyun Choi , Sang-in Lee
- 申请人: Jong-myeong Lee , Hyun-seok Lim , Byung-hee Kim , Gil-heyun Choi , Sang-in Lee
- 优先权: KR00-2700 20000120
- 主分类号: H01L214763
- IPC分类号: H01L214763
摘要:
A method for forming a metal interconnection filling a contact hole or a groove having a high aspect ratio, and a contact structure fabricated thereby. An interdielectric layer pattern, having a recessed region serving as a contact hole, a via hole or a groove, is formed on a semiconductor substrate. A barrier metal layer is formed on the entire surface of the resultant structure where the interdielectric layer pattern is formed. An anti-nucleation layer is selectively formed only on the non-recessed region of the barrier metal layer. The anti-nucleation layer is formed by forming a metal layer overlying the barrier metal layer in regions other than the recessed region, and then spontaneously oxidizing the metal layer in a vacuum. Also, the anti-nucleation layer may be formed by in-situ forming the barrier metal layer and the metal layer and then oxidizing the metal layer by an annealing process. Subsequently, a metal plug is selectively formed in the recessed region, surrounded by the barrier metal layer, thereby forming a metal interconnection for completely filling the contact hole or the groove having a high aspect ratio. A metal liner may be formed instead of the metal plug, followed by forming a metal layer filling the region surrounded by the metal liner, thereby forming a metal interconnection for completely filling the contact hole or groove having a high aspect ratio.