A method of forming a micro-via, for fabrication and design of a layout of a circuit board. A patterned conductive wiring layer is formed on the substrate. A copper layer is plated onto the substrate and the conductive wiring layer. A photoresist layer is formed on the copper layer. A part of the photoresist layer is removed to expose a part of the copper layer. Using the copper layer as a seed layer, a conductive pillar is formed on the exposed part of the copper layer. The photoresist layer is removed. The exposed plated copper layer is removed. An insulation layer is formed on surfaces of the substrate and the conductive pillar. A part of the insulation layer is removed to expose the conductive pillar. A patterned conductive wiring layer is formed on the conductive pillar.