发明授权
US06403458B2 Method for fabricating local interconnect structure for integrated circuit devices, source structures 失效
用于制造用于集成电路器件的局部互连结构的方法,源结构

  • 专利标题: Method for fabricating local interconnect structure for integrated circuit devices, source structures
  • 专利标题(中): 用于制造用于集成电路器件的局部互连结构的方法,源结构
  • 申请号: US09055056
    申请日: 1998-04-03
  • 公开(公告)号: US06403458B2
    公开(公告)日: 2002-06-11
  • 发明人: Jigish D. TrivediMichael P. Violette
  • 申请人: Jigish D. TrivediMichael P. Violette
  • 主分类号: H01L214763
  • IPC分类号: H01L214763
Method for fabricating local interconnect structure for integrated circuit devices, source structures
摘要:
A process for making a local interconnect and the structures formed thereby. The process is practiced by forming a Ti layer having a nitrogen-rich upper portion over a portion of a substrate, forming a refractory metal layer on the Ti layer, forming a Si layer on the refractory metal layer, removing a portion of the Si layer, and heating to form a local interconnect structure. During this process, a source structure for the local interconnect is formed. This source structure comprises a Ti layer having a nitrogen-rich upper portion overlying a portion of a substrate, a refractory metal layer overlying the Ti layer, and a silicon layer overlying the refractory metal layer. The resulting local interconnect comprises a titanium silicide layer disposed on a portion of a substrate, a nitrogen-rich Ti layer disposed on the titanium silicide layer, and a refractory-metal silicide layer disposed on the nitrogen-rich Ti layer. The local interconnect is especially useful for reducing cratering and consumption of silicon regions underlying the local interconnect.
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