In an SDRAM, a column decoder is split into four blocks, and a specific predecode signal is allocated to each block. A sub power supply line is provided in correspondence to each block, and a P-channel MOS transistor, having a relatively high threshold voltage, rendered conductive in response to the corresponding predecode signal is connected between the sub power supply line and a main power supply line. A power supply potential is supplied to only a selected block, for reducing a leakage current.