- 专利标题: Semiconductor memory device
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申请号: US09860795申请日: 2001-05-21
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公开(公告)号: US06414883B2公开(公告)日: 2002-07-02
- 发明人: Hideto Hidaka , Mikio Asakura , Kazuyasu Fujishima , Tsukasa Ooishi , Kazutami Arimoto , Shigeki Tomishima , Masaki Tsukude
- 申请人: Hideto Hidaka , Mikio Asakura , Kazuyasu Fujishima , Tsukasa Ooishi , Kazutami Arimoto , Shigeki Tomishima , Masaki Tsukude
- 优先权: JP5-257328 19931014; JP6-1017 19940110; JP6-148007 19940629
- 主分类号: G11C700
- IPC分类号: G11C700
摘要:
Drains of first and second transistors are connected to a low level line of an internal circuitry such as a sense amplifier related to determination of a potential in a memory cell. The first transistor has its gate diode-connected to a sense drive line and its source grounded. The second transistor receives at its gate an internally generated signal, and its source is grounded. In the standby state, the potential of the sense drive line is set higher than low level of said word lines by the threshold voltage Vthn of the first transistor and used as dummy GND potential Vss′, and in the active state, the second transistor is rendered conductive so as to prevent floating of the sense drive line from the dummy GND potential Vss′.
公开/授权文献
- US20010024383A1 Semiconductor memory device 公开/授权日:2001-09-27
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