A non-volatile memory device with configurable row redundancy includes a non-volatile memory having a matrix of memory cells and a matrix of redundant memory cells, both organized into rows and columns. The memory device also includes row and column decoding circuits; read and modify circuits for reading and modifying data stored in the memory cells; and at least one associative memory matrix, also organized into rows and columns, able to store the addresses of faulty rows, and control circuits for controlling the associative memory matrix. The memory device further includes a circuit for recognizing and comparing selected row addresses with faulty row addresses contained in the associative memory matrix, such as to produce de-selection of the faulty row and selection of the corresponding redundant cell row in the event of a valid recognition; and a configuration register, also comprising a matrix of non-volatile memory cells, and associated control circuits.