A memory pool control circuit according to the invention is provided with a CAM (content addressable memory: associative memory) 11. It further has a monitoring module 12, an area unlocking module 13, a local accessing module 14, an area locking module 15, a search control machine 16, and a timer 17. A plurality of tasks (processes) are operating on a processor 18, and one memory 19 is commonly used by the plurality of tasks (processes). When a task (process) has secured a memory space (called a block here), free areas therein are managed by a group of pointers. A block is divided into a plurality of fixed length fields. A group of flags match the memory space (block) in one-to-one correspondence. The flag group indicate whether or not individual fields are being used, i.e. the flag group indicates whether each individual field is being used or unused (free).