发明授权
US06426663B1 Analog/digital feedback circuitry for minimizing DC offset variations in an analog signal
失效
模拟/数字反馈电路,用于最小化模拟信号的直流偏移变化
- 专利标题: Analog/digital feedback circuitry for minimizing DC offset variations in an analog signal
- 专利标题(中): 模拟/数字反馈电路,用于最小化模拟信号的直流偏移变化
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申请号: US08610007申请日: 1996-03-04
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公开(公告)号: US06426663B1公开(公告)日: 2002-07-30
- 发明人: Gregory Jon Manlove , Mark Billings Kearney , Mark Russell Keyse , Richard Joseph Ravas
- 申请人: Gregory Jon Manlove , Mark Billings Kearney , Mark Russell Keyse , Richard Joseph Ravas
- 主分类号: H03F102
- IPC分类号: H03F102
摘要:
An analog signal gain circuit includes an input receiving an analog input signal defined by an ac signal component due to a driving force and a dc offset component independent of the driving force and an output providing an analog output signal defined by an amplified representation of the analog input signal and a dc offset component corresponding to a reference signal. A digital/analog feedback circuit includes a comparator having the reference signal as a switching threshold connected to an up/down counter having a number of digital outputs. The outputs of the up/down counter are connected to a D/A converter which converts the digital count to an analog feedback signal. The feedback signal is provided to the input of the analog signal gain circuit to minimize variations in the dc offset signal component of the analog output signal by compensating for the dc offset signal component of the analog input signal. The up/down counter is clocked at a slow rate to thereby provide a long time constant for minimizing the dc offset signal component.
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