Invention Grant
- Patent Title: Semiconductor device with test circuit
- Patent Title (中): 具有测试电路的半导体器件
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Application No.: US09877788Application Date: 2001-06-11
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Publication No.: US06429454B2Publication Date: 2002-08-06
- Inventor: Hiroshi Hatada , Nobuaki Otsuka , Osamu Hirabayashi , Yasushi Kameda
- Applicant: Hiroshi Hatada , Nobuaki Otsuka , Osamu Hirabayashi , Yasushi Kameda
- Priority: JP2000-175484 20000612
- Main IPC: A01L2358
- IPC: A01L2358

Abstract:
A semiconductor device has pads that are arranged in such a manner as to easily accept manual needles to carry out a test. This technique is applicable to carry out a test with use of a boundary scan test circuit in synchronization with a cycle time defined by a normal operation clock signal. The semiconductor device has a first pad connected to a first one of registers that form a serial scan chain, to supply test data to the registers, a second pad connected to a last one of the registers, and a third pad to supply a test clock signal to the registers. The registers are arranged in a central part of the semiconductor device, and the first to third pads are arranged at the periphery of the semiconductor device.
Public/Granted literature
- US20010051404A1 Semiconductor device with test circuit Public/Granted day:2001-12-13
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