Invention Grant
- Patent Title: Integrated circuit substrate that accommodates lattice mismatch stress
- Patent Title (中): 集成电路基板,适应晶格失配应力
-
Application No.: US09774199Application Date: 2001-01-29
-
Publication No.: US06429466B2Publication Date: 2002-08-06
- Inventor: Yong Chen , Scott W. Corzine , Theodore I. Kamins , Michael J. Ludowise , Pierre H. Mertz , Shih-Yuan Wang
- Applicant: Yong Chen , Scott W. Corzine , Theodore I. Kamins , Michael J. Ludowise , Pierre H. Mertz , Shih-Yuan Wang
- Main IPC: H01L31072
- IPC: H01L31072

Abstract:
A method for growing a crystalline layer that includes a first material on a growth surface of a crystalline substrate of a second material, wherein the first material and the second material have different lattice constants. A buried layer is generated in the substrate such that the buried layer isolates a layer of the substrate that includes the growth surface from the remainder of the substrate. The second material is then deposited on the growth surface at a growth temperature. The isolated layer of the substrate has a thickness that is less than the thickness at which defects are caused in the crystalline lattice of the first material by the second material crystallizing thereon. The buried layer is sufficiently malleable at the growth temperature to allow the deformation of the lattice of the isolated layer without deforming the remainder of the substrate. The present invention may be utilized for growing III-V semiconducting material layers on silicon substrates. In the case of silicon-based substrates, the buried layer is preferably SiO2 that is sufficiently malleable at the growth temperature to allow the deformation of the isolated substrate layer.
Public/Granted literature
- US20010006852A1 Method for relieving lattice mismatch stress in semiconductor devices Public/Granted day:2001-07-05
Information query