• 专利标题: Semiconductor device with self-aligned areas formed using a supplemental silicon overlayer
  • 申请号: US09342751
    申请日: 1999-06-29
  • 公开(公告)号: US06433388B1
    公开(公告)日: 2002-08-13
  • 发明人: Jun Kanamori
  • 申请人: Jun Kanamori
  • 主分类号: H01L2701
  • IPC分类号: H01L2701
Semiconductor device with self-aligned areas formed using a supplemental silicon overlayer
摘要:
In a method for fabricating a semiconductor device, a silicide material is formed at least on the surface of an area to be silicided. Then, a first RTA (Rapid Thermal Annealing) process is performed to form a first-reacted silicide region. Next, a supplemental silicon layer is formed over the entire surface; and a second RTA process is performed to form a second-reacted silicide region.
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