发明授权
- 专利标题: Electrostatic discharge device and method
- 专利标题(中): 静电放电装置及方法
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申请号: US09456036申请日: 1999-12-03
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公开(公告)号: US06433392B1公开(公告)日: 2002-08-13
- 发明人: E. Ajith Amerasekera , Vikas Gupta , Stanton P. Ashburn
- 申请人: E. Ajith Amerasekera , Vikas Gupta , Stanton P. Ashburn
- 主分类号: H01L2362
- IPC分类号: H01L2362
摘要:
The high current capabilities of a lateral npn transistor for application as a protection device against degradation due to electrostatic discharge (ESD) events are improved by adjusting the electrical resistivity of the material through which the collector current flows from the avalanching pn-junction to the wafer backside contact. As expressed in terms of the second threshold current improvements by a factor of 4 are reported. Two implant sequences are described which apply local masking and standard implant conditions to achieve the improvements without adding to the total number of process steps. The principle of p-well engineering is extended to ESD protection devices employing SCR-type devices.