发明授权
US06438042B1 Arrangement of bitline boosting capacitor in semiconductor memory device
有权
半导体存储器件中位线升压电容器的布置
- 专利标题： Arrangement of bitline boosting capacitor in semiconductor memory device
- 专利标题（中）： 半导体存储器件中位线升压电容器的布置
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申请号： US09879076申请日： 2001-06-11
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公开(公告)号： US06438042B1公开(公告)日： 2002-08-20
- 发明人: Sang-Seok Kang , Yun-Sang Lee , Jong-Hyun Choi , Jae-Hoon Joo
- 申请人： Sang-Seok Kang , Yun-Sang Lee , Jong-Hyun Choi , Jae-Hoon Joo
- 优先权： KR2001-347 20010104
- 主分类号： G11C700
- IPC分类号： G11C700
摘要：
A semiconductor memory device includes first and second isolation transistors for electrically connecting/isolating a pair of bitlines to/from a sense amplifier circuit, and a MOS transistor having a source region that is shared with one of sources of the first and second isolation transistors. The MOS transistor may be used as a bitline boosting capacitor.