The invention is a processing method and a processor architecture which contains multiple processors on the same silicon but which does not make a fixed compromise by statically assigning processing units to the processors but rather dynamically assigns such processing units so that they may be efficiently shared. The invention may provide the same functionality as was obtained with static allocation, and may be implemented on a single chip with much lower area for the same level of performance. The preferred architecture uses a mode bit that may be programatically set for passing control from a general purpose instruction decoder to a finite state machine. The preferred architecture further includes a multiplexer that uses the mode bit as its selection input.