发明授权
- 专利标题： Integrated circuit and method
- 专利标题（中）： 集成电路及方法
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申请号： US09826283申请日： 2001-04-03
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公开(公告)号： US06444542B2公开(公告)日： 2002-09-03
- 发明人: Theodore S. Moise , Guoqiang Xing , Mark Visokay , Justin F. Gaynor , Stephen R. Gilbert , Francis Celii , Scott R. Summerfelt , Luigi Colombo
- 申请人： Theodore S. Moise , Guoqiang Xing , Mark Visokay , Justin F. Gaynor , Stephen R. Gilbert , Francis Celii , Scott R. Summerfelt , Luigi Colombo
- 主分类号： H01L2176
- IPC分类号： H01L2176
摘要：
A via etch to contact a capacitor with ferroelectric between electrodes together with dielectric on an insulating diffusion barrier includes two-step etch with F-based dielectric etch and Cl- and F-based barrier etch.
公开/授权文献
- US20010055852A1 Integrated circuit and method 公开/授权日：2001-12-27