发明授权
- 专利标题: Network processor, memory organization and methods
- 专利标题(中): 网络处理器,内存组织和方法
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申请号: US09384744申请日: 1999-08-27
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公开(公告)号: US06460120B1公开(公告)日: 2002-10-01
- 发明人: Brian Mitchell Bass , Jean Louis Calvignac , Marco C. Heddes , Piyush Chunilal Patel , Juan Guillermo Revilla , Michael Steven Siegel , Fabrice Jean Verplanken
- 申请人: Brian Mitchell Bass , Jean Louis Calvignac , Marco C. Heddes , Piyush Chunilal Patel , Juan Guillermo Revilla , Michael Steven Siegel , Fabrice Jean Verplanken
- 主分类号: G06F1300
- IPC分类号: G06F1300
摘要:
A network switch apparatus, components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation of a plurality of memory elements and a plurality of interface processors formed on a semiconductor substrate. The memory elements and interface processors together form a network processor capable of cooperating with other elements in executing instructions directing the flow of data in a network. Access to the memory elements is controlled in a particular manner and under operative rules which provide controlled multiple accesses of the plurality of memory elements by the plurality of processors.
公开/授权文献
- US20020099855A1 NETWORK PROCESSOR, MEMORY ORGANIZATION AND METHODS 公开/授权日:2002-07-25