发明授权
- 专利标题: Low power MRAM memory array
- 专利标题(中): 低功耗MRAM存储器阵列
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申请号: US09865596申请日: 2001-05-29
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公开(公告)号: US06466471B1公开(公告)日: 2002-10-15
- 发明人: Manoj Bhattacharyya
- 申请人: Manoj Bhattacharyya
- 主分类号: G11C702
- IPC分类号: G11C702
摘要:
An MRAM memory array has nonlinear word lines and linear bit lines. The word lines cross the bit lines at memory cell locations, and are substantially coextensive with the bit lines at the crossing points. When a current is passed through the word and bit lines, the magnetic fields generated by the word line and the bit line at a coextensive portion are substantially aligned. The magnitude of the resultant field is therefore greater than in conventional, orthogonally oriented fields. Because the addition of the fields generated by the word and bit lines is enhanced, smaller word and bit line currents can be utilized, which reduces the size required for the memory array. The memory array can also utilize memory cells having a magnetic layer for producing a transverse magnetic field. The transverse field is orthogonally oriented to the magnetic field generated by the word and bit lines, and increases the reproducibility of switching of the memory cell. The transverse field also reduces the current required to switch the memory cell.
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