发明授权
US06472327B2 Method and system for etching tunnel oxide to reduce undercutting during memory array fabrication
有权
用于在存储器阵列制造期间蚀刻隧道氧化物以减少底切的方法和系统
- 专利标题： Method and system for etching tunnel oxide to reduce undercutting during memory array fabrication
- 专利标题（中）： 用于在存储器阵列制造期间蚀刻隧道氧化物以减少底切的方法和系统
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申请号： US09925205申请日： 2001-08-08
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公开(公告)号： US06472327B2公开(公告)日： 2002-10-29
- 发明人: King Wai Kelwin Ko , Mark S. Chang , Hao Fang
- 申请人： King Wai Kelwin Ko , Mark S. Chang , Hao Fang
- 主分类号： H01L21304
- IPC分类号： H01L21304
摘要：
A method and system for etching gate oxide during transistor fabrication is disclosed. The method and system begin by depositing a gate oxide on a substrate, followed by a deposition of a tunnel oxide mask over a portion of the gate oxide. The method and system further include performing a combination dry/wet-etch to remove the gate oxide uncovered by the tunnel oxide mask, which minimizes tunnel oxide undercut.
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