发明授权
US06473838B1 Data transfer system for multiple network processors using dual DRAM storage
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使用双DRAM存储的多个网络处理器的数据传输系统
- 专利标题: Data transfer system for multiple network processors using dual DRAM storage
- 专利标题(中): 使用双DRAM存储的多个网络处理器的数据传输系统
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申请号: US09477576申请日: 2000-01-04
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公开(公告)号: US06473838B1公开(公告)日: 2002-10-29
- 发明人: Brian Mitchell Bass , Jean Louis Calvignac , Marco C. Heddes , Steven Kenneth Jenkins , Michael Steven Siegel , Michael Raymond Trombley , Fabrice Jean Verplanken
- 申请人: Brian Mitchell Bass , Jean Louis Calvignac , Marco C. Heddes , Steven Kenneth Jenkins , Michael Steven Siegel , Michael Raymond Trombley , Fabrice Jean Verplanken
- 主分类号: G06F1200
- IPC分类号: G06F1200
摘要:
The ability of network processors to move data to and from dynamic random access memory (DRAM) chips used in computer systems is enhanced in several respects. In one aspect of the invention, two double data rate DRAMS are used in parallel to double the bandwidth for increased throughput of data. The movement of data is further improved by setting 4 banks of full ‘read’ and 4 banks of full ‘write’ by the network processor for every repetition of the DRAM time clock. A scheme for randomized ‘read’ and ‘write’ access by the network processor is disclosed. This scheme is particularly applicable to networks such as Ethernet that utilize variable frame sizes.
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