发明授权
US06473865B1 Apparatus comprising clock control circuit, method of controlling clock signal and device using internal clock signal synchronized to external clock signal
有权
装置包括时钟控制电路，控制时钟信号的方法和使用与外部时钟信号同步的内部时钟信号的装置
- 专利标题： Apparatus comprising clock control circuit, method of controlling clock signal and device using internal clock signal synchronized to external clock signal
- 专利标题（中）： 装置包括时钟控制电路，控制时钟信号的方法和使用与外部时钟信号同步的内部时钟信号的装置
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申请号： US09272171申请日： 1999-03-18
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公开(公告)号： US06473865B1公开(公告)日： 2002-10-29
- 发明人: Masahiro Kamoshida , Haruki Toda , Tsuneaki Fuse , Yukihito Oowaki
- 申请人： Masahiro Kamoshida , Haruki Toda , Tsuneaki Fuse , Yukihito Oowaki
- 优先权： JP10-069060 19980318
- 主分类号： G06F112
- IPC分类号： G06F112
摘要：
Each delay unit is divided into two delay unit groups, the preceding stage side and the succeeding stage side. To the delay unit group in the preceding stage side, power supply voltage is supplied via a power supply terminal, and to each delay unit of the delay unit group in the succeeding stage side, power supply voltage is supplied from the power supply terminal via a power supply control switch. A forward-pulse detecting circuit detects that forward pulse was propagated to a stage between the N-th stage and a stage a predetermined number of stages before the N-th, and outputs the detected result to the power supply control switch. With this operation, when forward pulse is propagated to the (N+1)th stage, power supply voltage is supplied also to the delay unit group in the succeeding stage side. As electric power is not supplied to the delay unit group in the succeeding stage side when forward pulse is not propagated to the (N+1)th stage, wasteful consumption of electric power is prevented.
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