A power MOSFET includes an n−-drain layer, a drain contact layer disposed on a first side of the drain layer, a p-type base layer disposed on a second side of the drain layer, and an n-source layer disposed on the base layer. A gate electrode faces, through a gate insulating film, a channel region, which is part of the base layer between the drain and source layers. Source and drain electrodes are electrically connected to the source and drain contact layers, respectively. A plurality of hetero regions having a dielectric constant higher than that of the drain layer is disposed in the drain layer between the source and drain electrodes.