Texture data which is two-dimensional image data indicating color data of multiple pixels positioned in a matrix form is stored in a texture buffer of a DRAM, a texture engine circuit combines the bit data making up the U address of a two-dimensional address (U, V) represented by n bits (wherein n is an integer of 1 or greater) and the bit data making up the V address of the two-dimensional address (U, V) represented by m bits (wherein m is an integer of 1 or greater), thereby generating an (n+m)-bit one-dimensional address, and the generated one-dimensional address is used to access the storage circuit. Accordingly, the storage area of the texture buffer can be used efficiently with a small circuit configuration.