• 专利标题: Stacked local interconnect structure and method of fabricating same
  • 申请号: US09892956
    申请日: 2001-06-27
  • 公开(公告)号: US06482689B2
    公开(公告)日: 2002-11-19
  • 发明人: Jigish D. Trivedi
  • 申请人: Jigish D. Trivedi
  • 主分类号: H01L218238
  • IPC分类号: H01L218238
Stacked local interconnect structure and method of fabricating same
摘要:
A method of forming stacked local interconnects that do not extend into higher levels within a multilevel IC device for economizing space available within the IC device and increasing design flexibility. In one embodiment, the method of the present invention provides a stacked local interconnect which electrically connects a first group of interconnected electrical features with one or more additional isolated groups of interconnected electrical features or one or more isolated individual electrical features. In a second embodiment, the method of the present invention provides a stacked local interconnect which electrically connects an individual electrical feature to one or more additional isolated electrical features.
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