发明授权
US06489196B1 Method of forming a capacitor with high capacitance and low voltage coefficient
有权
形成具有高电容和低电压系数的电容器的方法
- 专利标题： Method of forming a capacitor with high capacitance and low voltage coefficient
- 专利标题（中）： 形成具有高电容和低电压系数的电容器的方法
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申请号： US10055943申请日： 2002-01-28
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公开(公告)号： US06489196B1公开(公告)日： 2002-12-03
- 发明人: Ming-Yu Lin , Hsueh-Wen Wang
- 申请人： Ming-Yu Lin , Hsueh-Wen Wang
- 主分类号： H01L218242
- IPC分类号： H01L218242
摘要：
The present invention provides a method of forming a capacitor in an integrated circuit. The method comprises providing a semiconductor substrate having a conductive layer thereon. The partial conductive layer is removed to form an electrode. A plurality of first dopants are implanted on a surface of the electrode to form a first doped region. Then a plurality of second dopants are implanted into the electrode to form a second doped region below the first doped region. Then the capacitor is formed comprising the electrode. The first doped region and the second region can reduce voltage coefficient as well as increase capacitance of the capacitor.