A semiconductor integrated circuit device includes a logic circuit, a digital-to-analog converter generating a substrate bias for controlling a threshold voltage of an MIS transistor of the logic circuit, a voltage control circuit outputting a control signal in accordance with a delay signal, and a delay detector, including a circuit which monitors variations in operating speed of the delay detector. The delay detector receives the clock signal and outputs the delay signal. The voltage control circuit receives the delay signal and outputs the control signal according to a delay indicated by the delay signal. The digital-to-analog converter receives the control signal from the voltage control circuit and generates a voltage according to the control signal. The operating speed of each of the logic circuits and the delay detector is controlled by a voltage supplied from the digital-to-analog converter.