发明授权
US06504207B1 Method to create EEPROM memory structures integrated with high performance logic and NVRAM, and operating conditions for the same 失效
创建集成了高性能逻辑和NVRAM的EEPROM存储器结构的方法,以及与之相同的操作条件

Method to create EEPROM memory structures integrated with high performance logic and NVRAM, and operating conditions for the same
摘要:
A method and structure for a EEPROM memory device integrated with high performance logic or NVRAM. The EEPROM device includes a floating gate and program gate self-aligned with one another. During programming, electron tunneling occurs between the floating gate and the program gate.
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