METHODS OF CONVERTING AND/OR TRANSLATING A LAYOUT OR CIRCUIT SCHEMATIC OR NETLIST THEREOF TO A SIMULATION SCHEMATIC OR NETLIST, AND/OR OF SIMULATING FUNCTION(S) AND/OR PERFORMANCE CHARACTERISTIC(S) OF A CIRCUIT

发明授权

US06507932B1 METHODS OF CONVERTING AND/OR TRANSLATING A LAYOUT OR CIRCUIT SCHEMATIC OR NETLIST THEREOF TO A SIMULATION SCHEMATIC OR NETLIST, AND/OR OF SIMULATING FUNCTION(S) AND/OR PERFORMANCE CHARACTERISTIC(S) OF A CIRCUIT 有权

标题翻译：将布局或电路图或其列表转换为/或转换为模拟示意图或列表的模式和/或模拟功能和/或性能特征（S）的方法

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专利标题： METHODS OF CONVERTING AND/OR TRANSLATING A LAYOUT OR CIRCUIT SCHEMATIC OR NETLIST THEREOF TO A SIMULATION SCHEMATIC OR NETLIST, AND/OR OF SIMULATING FUNCTION(S) AND/OR PERFORMANCE CHARACTERISTIC(S) OF A CIRCUIT
专利标题（中）： 将布局或电路图或其列表转换为/或转换为模拟示意图或列表的模式和/或模拟功能和/或性能特征（S）的方法
申请号： US09347074

申请日： 1999-07-02
公开(公告)号： US06507932B1

公开(公告)日： 2003-01-14
发明人: Greg J. Landry , Alan Hawse
申请人： Greg J. Landry , Alan Hawse
主分类号： G06F1750
IPC分类号： G06F1750

METHODS OF CONVERTING AND/OR TRANSLATING A LAYOUT OR CIRCUIT SCHEMATIC OR NETLIST THEREOF TO A SIMULATION SCHEMATIC OR NETLIST, AND/OR OF SIMULATING FUNCTION(S) AND/OR PERFORMANCE CHARACTERISTIC(S) OF A CIRCUIT

摘要：

A method of converting or translating a layout or schematic netlist to a simulation netlist, comprising the steps of identifying net-shorting elements in the layout or schematic netlist and automatically replacing at least one such net-shorting element with an RC network to generate the simulation netlist.

摘要（中）：

一种将布局或示意图网表转换或转换为模拟网表的方法，包括以下步骤：识别布局或示意图网表中的网络短路元件，并用RC网络自动替换至少一个这样的网络短路元件以产生模拟网表。

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