- 专利标题: Insulated gate semiconductor device with high minority carrier injection and low on-voltage by enlarged pn-junction area
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申请号: US09906825申请日: 2001-07-18
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公开(公告)号: US06509610B2公开(公告)日: 2003-01-21
- 发明人: Akira Kawahashi , Katsuhiko Nishiwaki
- 申请人: Akira Kawahashi , Katsuhiko Nishiwaki
- 优先权: JP2000-228872 20000728
- 主分类号: H01L21336
- IPC分类号: H01L21336
摘要:
A semiconductor device is formed such that a contact surface between a p-type high-concentration semiconductor region and an n-type high-concentration buffer region assumes a convexo-concave shape. This makes it possible to enlarge an area of the contact surface between the p-type high-concentration semiconductor region and the n-type high-concentration buffer region. As a result, holes are injected into an n-type low-concentration drift region from the p-type high-concentration semiconductor region with higher efficiency and with a less voltage drop between the pn-junction. Thus, effects of conductivity modulation can be achieved sufficiently and the on-resistance and the voltage drop of an IGBT can be lowered.
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