- 专利标题: Thin film transistor substrate and process for producing the same
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申请号: US09931761申请日: 2001-08-20
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公开(公告)号: US06512270B2公开(公告)日: 2003-01-28
- 发明人: Takeshi Satou , Takuya Takahashi , Tomoya Katou , Toshiki Kaneko , Hajime Ikeda
- 申请人: Takeshi Satou , Takuya Takahashi , Tomoya Katou , Toshiki Kaneko , Hajime Ikeda
- 优先权: JP2001-065913 20010309
- 主分类号: H01L2701
- IPC分类号: H01L2701
摘要:
A polycrystalline Si thin film transistor substrate having a self-aligned LDD and provided with a gate made of a Mo—W alloy having a W concentration not lower than 5% by weight and lower than 25% by weight and preferably a W concentration of 17 to 22% by weight, which is formed by a process comprising a wet-etching step using an etching solution having a phosphoric acid concentration of 60% to 70% by weight, has uniform characteristic properties and is excellent in productivity.
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