In NAND type nonvolatile semiconductor memory each memory cell is made of a dual gate transistor connected at one gate portion thereof to ferroelectrics, a plurality of such memory cells are connected in series to form a memory block, and a plurality of such memory blocks are arranged to form a memory cell array and make up NAND type nonvolatile semiconductor memory. Used as each dual gate transistor is a thin film transistor which has a first gate formed on one surface of a semiconductor thin film via a first gate insulating film and a ferroelectric thin film, and a second gate electrode formed on the other surface of the semiconductor thin film via second gate insulating film in confrontation with the first gate electrode. Alternatively, ferroelectric gate type dual gate thin film transistors are made by forming thin film transistors on opposite surfaces of a ferroelectric thin film to form memory cells.