Invention Grant
- Patent Title: Process for controlling a read access for a dynamic random access memory and corresponding memory
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Application No.: US09883697Application Date: 2001-06-18
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Publication No.: US06538942B2Publication Date: 2003-03-25
- Inventor: Richard Ferrant
- Applicant: Richard Ferrant
- Priority: FR0008131 20000626
- Main IPC: G11C700
- IPC: G11C700

Abstract:
Each memory cell of a memory device is connected to a bit line of a memory array and is associated with a read/rewrite amplifier connected between the bit line and a reference bit line. The bit line and the reference bit line are precharged to a predetermined precharge voltage. The content of a selected memory cell is read and refreshed based upon an associated read/rewrite amplifier. Between the precharging and the reading and refreshing, two capacitors previously charged to a charging voltage greater than the precharge voltage are respectively connected to the bit line and to the reference bit line.
Public/Granted literature
- US20020009008A1 Process for controlling a read access for a dynamic random access memory and corresponding memory Public/Granted day:2002-01-24
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