• 专利标题: Semiconductor device including a plurality of interconnection layers, manufacturing method thereof and method of designing semiconductor circuit used in the manufacturing method
  • 申请号: US09907675
    申请日: 2001-07-19
  • 公开(公告)号: US06541862B2
    公开(公告)日: 2003-04-01
  • 发明人: Hiroyuki AmishiroMotoshige Igarashi
  • 申请人: Hiroyuki AmishiroMotoshige Igarashi
  • 优先权: JP11-014070 19990122
  • 主分类号: H01L2348
  • IPC分类号: H01L2348
Semiconductor device including a plurality of interconnection layers, manufacturing method thereof and method of designing semiconductor circuit used in the manufacturing method
摘要:
A semiconductor device including an interconnection structure having superior electrical characteristics and allowing higher speed of operation and lower power consumption even when miniaturized, manufacturing method thereof and a method of designing a semiconductor circuit used in the manufacturing method are provided. In the semiconductor device, a conductive region is formed on a main surface of a semiconductor substrate. A first interconnection layer is electrically connected to the conductive region, has a relatively short line length, and contains a material having relatively high electrical resistance. A first insulator is formed to surround the first interconnection layer and has a relatively low dielectric constant. A second interconnection layer is formed on the main surface of the semiconductor substrate, contains a material having low electrical resistance than the material contained in the first interconnection layer, and has longer line length than the first interconnection layer. A second insulator is formed to surround the second interconnection layer and has a dielectric constant higher than the first insulator.
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