发明授权
- 专利标题: Process flow for capacitance enhancement in a DRAM trench
- 专利标题(中): DRAM沟槽中电容增强的工艺流程
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申请号: US09723420申请日: 2000-11-28
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公开(公告)号: US06555430B1公开(公告)日: 2003-04-29
- 发明人: Michael P. Chudzik , Johnathan Faltermeier , Rajarao Jammy , Stephan Kudelka , Irene McStay , Kenneth T. Settlemyer, Jr. , Helmut Horst Tews
- 申请人: Michael P. Chudzik , Johnathan Faltermeier , Rajarao Jammy , Stephan Kudelka , Irene McStay , Kenneth T. Settlemyer, Jr. , Helmut Horst Tews
- 主分类号: H01L218242
- IPC分类号: H01L218242
摘要:
Methods forming a trench region of a trench capacitor structure having increase surface area are provided. One method includes the steps of forming a discontinuous polysilicon layer on exposed walls of a lower trench region, the discontinuous polysilicon layer having gaps therein which expose portions of said substrate; oxidizing the lower trench region such that the exposed portions of said substrate provided by the gaps in the discontinuous polysilicon layer are oxidized into oxide material which forms a smooth and wavy layer with the discontinuous polysilicon layer; and etching said oxide material so as to form smooth hemispherical grooves on the walls of the trench region.