发明授权
- 专利标题: Method of forming low resistance barrier on low k interconnect
- 专利标题(中): 在低k互连上形成低电阻势垒的方法
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申请号: US09884059申请日: 2001-06-20
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公开(公告)号: US06555461B1公开(公告)日: 2003-04-29
- 发明人: Christy Mei-Chu Woo , Suzette K. Pangrle , Minh Van Ngo
- 申请人: Christy Mei-Chu Woo , Suzette K. Pangrle , Minh Van Ngo
- 主分类号: H01L214763
- IPC分类号: H01L214763
摘要:
A method for forming a metal interconnect structure provides a conformal layer of barrier material, such as a nitride, within a patterned opening in a dielectric layer. The barrier material is deposited after the opening is etched to the dielectric layer, stopping on a diffusion barrier. A first layer of a metal barrier material, such as tantalum, is conformally deposited on the barrier material. A directional etch is performed that removes horizontal nitride and tantalum, leaving the nitride and tantalum on the sidewalls of the patterned opening. The barrier material prevents contamination of the dielectric layer from conductive material, such as copper, during the etching of the diffusion barrier overlying the conductive material, and during subsequent sputter etch cleaning. A thin, second metal layer is conformally deposited and forms a suitable barrier on the sidewalls of the opening, while providing low contact resistance between the second metal layer and the underlying substrate.
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