发明授权
US06558998B2 SOI type integrated circuit with a decoupling capacity and process for embodiment of such a circuit 有权
具有解耦能力的SOI型集成电路和用于这种电路实施例的工艺

  • 专利标题: SOI type integrated circuit with a decoupling capacity and process for embodiment of such a circuit
  • 专利标题(中): 具有解耦能力的SOI型集成电路和用于这种电路实施例的工艺
  • 申请号: US10075382
    申请日: 2002-02-15
  • 公开(公告)号: US06558998B2
    公开(公告)日: 2003-05-06
  • 发明人: Marc BellevilleMichel Bruel
  • 申请人: Marc BellevilleMichel Bruel
  • 优先权: FR9807495 19980615
  • 主分类号: H01L218238
  • IPC分类号: H01L218238
SOI type integrated circuit with a decoupling capacity and process for embodiment of such a circuit
摘要:
Integrated circuit comprising: at least one first and one second power supply terminal (418, 420), at least one active area (302, 304, 306, 308) formed in a thin layer (206) of a substrate and electrically connected to at least one of the power supply terminals. According to the invention, the circuit also comprises capacitive decoupling means formed by at least one dielectric capacitor (110, 112, 114) connected between the said, first and second power supply terminals and formed in a region of the substrate that is electrically insulated from the thin substrate layer (206). Applications include the manufacture of portable electronic equipment.
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